Questions?
[x] Content Type
Patent Filings
[x] SRC Program
GRC
[x] GRC Science Area
DES – Design Sciences
Thrust/Theme
TT – Test & Testability 7
CD – Circuit Design 6
DesTech – Design Techniques 6
TechCAD – Technology CAD 3
DV – Design Verification 1
DesSyn – Design Synthesis 1
Synthesis & Verification 1
1 through 25 of 25 similar documents, best matches first.   
1: Test Pattern Generation for an Electronic Circuit Using a Transformed...
Test Pattern Generation for an Electronic Circuit Using a Transformed Circuit Description Application Type: Utility Patent Number: 5528604 Country: United States Status: Filed on ...
URL: https://www.src.org/library/patent/p0075/
Modified: 1996-06-18 - 22KB
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2: Methods for Characterizing, Generating Test Sequences for, and...
Methods for Characterizing, Generating Test Sequences for, and Simulating Integrated Circuit Faults Using Fault Tuples and Related Systems and Computer Program Products Application ...
URL: https://www.src.org/library/patent/p0228/
Modified: 2004-12-28 - 22KB
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3: Built-in Current Testing of Integrated Circuits (Patent P0109...
Built-in Current Testing of Integrated Circuits Application Type: Utility Patent Number: 5025344 Country: United States Status: Filed on 22-Feb-1990, Issued on 18-Jun-1991, Patent ...
URL: https://www.src.org/library/patent/p0109/
Modified: 1991-06-18 - 22KB
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4: Fully Differential Operational Amplifier having Frequency Dependent...
Fully Differential Operational Amplifier having Frequency Dependent Impedance Division Application Type: Utility Patent Number: 5146179 Country: United States Status: Filed on ...
URL: https://www.src.org/library/patent/p0148/
Modified: 1992-09-08 - 22KB
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5: Current Signatures for IDDQ Testing (Patent P0084) - SRC
Current Signatures for IDDQ Testing Application Type: Utility Patent Number: 6175244 Country: United States Status: Filed on 25-Apr-1997, Issued on 16-Jan-2001, Patent Expired ...
URL: https://www.src.org/library/patent/p0084/
Modified: 2001-01-16 - 22KB
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6: Method for Automatically Generating Test Vectors for Digital...
Method for Automatically Generating Test Vectors for Digital Integrated Circuits Application Type: Utility Patent Number: 5377197 Country: United States Status: Filed on ...
URL: https://www.src.org/library/patent/p0059/
Modified: 1994-12-27 - 22KB
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7: Method for Diagnosing Bridging Faults in Integrated Circuits...
Method for Diagnosing Bridging Faults in Integrated Circuits Application Type: Utility Patent Number: 6202181 Country: United States Status: Filed on 3-Nov-1997, Issued on ...
URL: https://www.src.org/library/patent/p0199/
Modified: 2001-03-13 - 23KB
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8: Method for Diagnosing Bridging Faults in Integrated Circuits...
Method for Diagnosing Bridging Faults in Integrated Circuits Application Type: Continuation (in part) Patent Number: 6560736 Country: United States Status: Filed on 10-Jan-2001, ...
URL: https://www.src.org/library/patent/p0338/
Modified: 2003-05-06 - 23KB
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9: Method, Apparatus and Computer Program Product for Determining...
Method, Apparatus and Computer Program Product for Determining a Frequency Domain Response of a Nonlinear Microelectronic Circuit Application Type: Utility Patent Number: 5663890 ...
URL: https://www.src.org/library/patent/p0014/
Modified: 1997-09-02 - 24KB
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10: Charge-Based Frequency Measurement BIST (Patent P0185) - SRC
Charge-Based Frequency Measurement BIST Application Type: Utility Patent Number: 6885700 Country: United States Status: Filed on 23-Sep-1999, Issued on 26-Apr-2005, Patent ...
URL: https://www.src.org/library/patent/p0185/
Modified: 2005-04-26 - 24KB
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11: Charge-Based Frequency Measurement BIST (Patent P0557) - SRC
Charge-Based Frequency Measurement BIST Application Type: European Patent Office Patent Number: 1214605 Status: Filed on 19-Jun-2002, Issued on 22-Mar-2006 Organization: University ...
URL: https://www.src.org/library/patent/p0557/
Modified: 2006-03-22 - 23KB
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12: Methods, Apparatus and Computer Program products for Synthesizing...
Methods, Apparatus and Computer Program products for Synthesizing Integrated Circuits with Electrostatic Discharge Capability and Correcting Ground Rule Faults Therein Application ...
URL: https://www.src.org/library/patent/p0049/
Modified: 1998-08-18 - 27KB
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13: Formal Verification of a Logic Design Through Implicit Enumeration...
Formal Verification of a Logic Design Through Implicit Enumeration of Strongly Connected Components Application Type: Utility Patent Number: 6526551 Country: United States Status: ...
URL: https://www.src.org/library/patent/p0189/
Modified: 2003-02-25 - 22KB
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14: Reverse Biasing Logic Circuit (Patent P0299) - SRC
Reverse Biasing Logic Circuit Application Type: Utility Patent Number: 6759873 Country: United States Status: Filed on 21-May-2002, Issued on 6-Jul-2004 Organization: University of ...
URL: https://www.src.org/library/patent/p0299/
Modified: 2004-07-06 - 23KB
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15: ESD/EOS Protection Circuits for Integrated Circuits (Patent P0074...
ESD/EOS Protection Circuits for Integrated Circuits Application Type: Utility Patent Number: 5450267 Country: United States Status: Filed on 31-Mar-1993, Issued on 12-Sep-1995, ...
URL: https://www.src.org/library/patent/p0074/
Modified: 1995-09-12 - 25KB
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16: HIGH-SPEED CLOCK AND DATA RECOVERY CIRCUIT (Patent P0378) - SRC
HIGH-SPEED CLOCK AND DATA RECOVERY CIRCUIT Application Type: Utility Patent Number: 7286625 Country: United States Status: Filed on 9-Jul-2003, Issued on 23-Oct-2007, Patent ...
URL: https://www.src.org/library/patent/p0378/
Modified: 2007-10-23 - 23KB
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17: Source Contact Placement for Efficient ESD/EOS Protection in...
Source Contact Placement for Efficient ESD/EOS Protection in Grounded Substrate MOS Integrated Circuit Application Type: Utility Patent Number: 5404041 Country: United States ...
URL: https://www.src.org/library/patent/p0067/
Modified: 1995-04-04 - 25KB
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18: Method of placing source contacts for efficient EDS\EOS protection...
Method of placing source contacts for efficient EDS\EOS protection in grounded substrate MOS integrated circuit Application Type: Divisional Patent Number: 5468667 Country: United ...
URL: https://www.src.org/library/patent/p0373/
Modified: 1995-11-21 - 22KB
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19: Method of High Performance CMOS Design (Patent P0183) - SRC
Method of High Performance CMOS Design Application Type: Utility Patent Number: 6549038 Country: United States Status: Filed on 14-Sep-2000, Issued on 15-Apr-2003, Patent Abandoned ...
URL: https://www.src.org/library/patent/p0183/
Modified: 2003-04-15 - 22KB
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20: Method of Fabricating a Self-Aligned High Speed MOSFET Device...
Method of Fabricating a Self-Aligned High Speed MOSFET Device Application Type: Continuation (in part) Patent Number: 5599728 Country: United States Status: Filed on 28-Oct-1994, ...
URL: https://www.src.org/library/patent/p0006/
Modified: 1997-02-04 - 22KB
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21: Dynamic Threshold Voltage Mosfet Having Gate to Body Connection...
Dynamic Threshold Voltage Mosfet Having Gate to Body Connection for Ultra-Low Voltage Operation Application Type: Utility Patent Number: 5559368 Country: United States Status: ...
URL: https://www.src.org/library/patent/p0004/
Modified: 1996-09-24 - 22KB
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22: Silicon-on-insulator transistors having improved current characteristi...
Silicon-on-insulator transistors having improved current characteristics and reduced electrostatic discharge susceptibility Application Type: Divisional Patent Number: 5982003 ...
URL: https://www.src.org/library/patent/p0002/
Modified: 1999-11-09 - 22KB
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23: CMOS Parallel Dynamic Logic and Speed Enhanced Static Logic ...
CMOS Parallel Dynamic Logic and Speed Enhanced Static Logic Application Type: Utility Patent Number: 6794903 Country: United States Status: Filed on 7-May-2001, Issued on ...
URL: https://www.src.org/library/patent/p0239/
Modified: 2004-09-21 - 22KB
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24: CMOS Sequential Logic Configuration for an edge triggered Flip...
CMOS Sequential Logic Configuration for an edge triggered Flip-Flop Application Type: Utility Patent Number: 6784694 Country: United States Status: Filed on 18-Apr-2002, Issued on ...
URL: https://www.src.org/library/patent/p0292/
Modified: 2004-08-31 - 22KB
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25: CMOS Skewed Static Logic and Method of Synthesis (Patent P0294...
CMOS Skewed Static Logic and Method of Synthesis Application Type: Utility Patent Number: 6624665 Country: United States Status: Filed on 8-May-2002, Issued on 23-Sep-2003, Patent ...
URL: https://www.src.org/library/patent/p0294/
Modified: 2003-09-23 - 22KB
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1 through 25 of 25 similar documents, best matches first.