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TT – Test & Testability
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- 31:
Retiming-Based Design Flow for Delay Recovery on Inter-Die Paths...
- Retiming-Based Design Flow for Delay Recovery on Inter-Die Paths in 3D ICs Application Type: Utility Patent Number: 8832608 Country: United States Status: Filed on 17-Jun-2013, ...
URL: https://www.src.org/library/patent/p1411/
Modified: 2014-09-09 - 22KB
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- 32:
Systems and Methods for Electromagnetic Band Gap Structure Sythesis...
- Systems and Methods for Electromagnetic Band Gap Structure Sythesis Application Type: Utility Patent Number: 8060457 Country: United States Status: Filed on 13-Sep-2007, Issued on ...
URL: https://www.src.org/library/patent/p1039/
Modified: 2011-11-15 - 22KB
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- 33:
Power Switch Design and Method for Reducing Leakage Power in...
- Power Switch Design and Method for Reducing Leakage Power in Low-Power Integrated Circuits Application Type: Utility Patent Number: 8373493 Country: United States Status: Filed on ...
URL: https://www.src.org/library/patent/p1239/
Modified: 2013-02-12 - 22KB
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- 34:
Method and Architecture for Pre-bond Probing of TSVs in 3D Stacked...
- Method and Architecture for Pre-bond Probing of TSVs in 3D Stacked Integrated Circuits Application Type: Utility Patent Number: 8775108 Country: United States Status: Filed on ...
URL: https://www.src.org/library/patent/p1291/
Modified: 2014-07-08 - 22KB
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- 35:
Method for Diagnosing Bridging Faults in Integrated Circuits...
- Method for Diagnosing Bridging Faults in Integrated Circuits Application Type: Continuation (in part) Patent Number: 6560736 Country: United States Status: Filed on 10-Jan-2001, ...
URL: https://www.src.org/library/patent/p0338/
Modified: 2003-05-06 - 23KB
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