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GRC Science Area
CADTS – Computer Aided Design & Test Sciences
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- 31:
Method and Apparatus to Reduce Noise Fluctuation in On-Chip Power...
- Method and Apparatus to Reduce Noise Fluctuation in On-Chip Power Distribution Networks Application Type: Utility Patent Number: 7595679 Country: United States Status: Filed on ...
URL: https://www.src.org/library/patent/p0564/
Modified: 2009-09-29 - 22KB
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- 32:
Method and System to Check Correspondence between Different Representa...
- Method and System to Check Correspondence between Different Representations of a Circuit Application Type: Continuation (in part) Patent Number: 7418680 Country: United States ...
URL: https://www.src.org/library/patent/p0476/
Modified: 2008-08-26 - 22KB
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- 33:
Method and System for Synthesizing Relative Timing Constraints...
- Method and System for Synthesizing Relative Timing Constraints on an Integrated Circuit Design to Facilitate Timing Verification Application Type: Utility Patent Number: 8239796 ...
URL: https://www.src.org/library/patent/p1202/
Modified: 2012-08-07 - 24KB
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- 34:
Formal Verification of a Logic Design Through Implicit Enumeration...
- Formal Verification of a Logic Design Through Implicit Enumeration of Strongly Connected Components Application Type: Utility Patent Number: 6526551 Country: United States Status: ...
URL: https://www.src.org/library/patent/p0189/
Modified: 2003-02-25 - 22KB
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- 35:
System and Method to Test Integrated Circuits on a Wafer (Patent...
- System and Method to Test Integrated Circuits on a Wafer Application Type: Utility Patent Number: 7325180 Country: United States Status: Filed on 26-Nov-2003, Issued on ...
URL: https://www.src.org/library/patent/p0413/
Modified: 2008-01-29 - 22KB
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- 36:
METHOD FOR CORRECTING A MASK DESIGN LAYOUT (Patent P1708) - SRC
- METHOD FOR CORRECTING A MASK DESIGN LAYOUT Application Type: Utility Patent Number: 7149999 Country: United States Status: Filed on 25-Feb-2004, Issued on 12-Dec-2006, Patent ...
URL: https://www.src.org/library/patent/p1708/
Modified: 2006-12-12 - 23KB
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- 37:
Method and Apparatus For Rapidly Modeling and Simulating Intra...
- Method and Apparatus For Rapidly Modeling and Simulating Intra-Die Statistical Variations in Integrated Circuits using Compressed Parameter Models Application Type: Utility Patent ...
URL: https://www.src.org/library/patent/p1160/
Modified: 2012-10-16 - 24KB
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- 38:
Method for Testing Analog and Mixed-Signal Circuits Using Dynamic...
- Method for Testing Analog and Mixed-Signal Circuits Using Dynamic Element Matching for Source Linearization Application Type: Utility Patent Number: 7587647 Country: United States ...
URL: https://www.src.org/library/patent/p0468/
Modified: 2009-09-08 - 23KB
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- 39:
Method and Apparatus for Simulating a Microelectronic Circuit...
- Method and Apparatus for Simulating a Microelectronic Circuit Application Type: Utility Patent Number: 5313398 Country: United States Status: Filed on 23-Jul-1992, Issued on ...
URL: https://www.src.org/library/patent/p0070/
Modified: 1994-05-17 - 21KB
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- 40:
Methods, Systems, and Computer Program Products for Modeling...
- Methods, Systems, and Computer Program Products for Modeling inductive Effects in a circuit combing a plurality of localized models Application Type: Utility Patent Number: 6820245 ...
URL: https://www.src.org/library/patent/p0251/
Modified: 2004-11-16 - 23KB
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- 41:
Method and System to Verify a Circuit Design By Verifying Consistency...
- Method and System to Verify a Circuit Design By Verifying Consistency Between Two Different Language Representations of a Circuit Design Application Type: Utility Patent Number: ...
URL: https://www.src.org/library/patent/p0424/
Modified: 2007-05-29 - 22KB
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- 42:
Methods for Characterizing, Generating Test Sequences for, and...
- Methods for Characterizing, Generating Test Sequences for, and Simulating Integrated Circuit Faults Using Fault Tuples and Related Systems and Computer Program Products Application ...
URL: https://www.src.org/library/patent/p0228/
Modified: 2004-12-28 - 22KB
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- 43:
Method for Diagnosing Bridging Faults in Integrated Circuits...
- Method for Diagnosing Bridging Faults in Integrated Circuits Application Type: Utility Patent Number: 6202181 Country: United States Status: Filed on 3-Nov-1997, Issued on ...
URL: https://www.src.org/library/patent/p0199/
Modified: 2001-03-13 - 23KB
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- 44:
Method for Diagnosing Bridging Faults in Integrated Circuits...
- Method for Diagnosing Bridging Faults in Integrated Circuits Application Type: Continuation (in part) Patent Number: 6560736 Country: United States Status: Filed on 10-Jan-2001, ...
URL: https://www.src.org/library/patent/p0338/
Modified: 2003-05-06 - 23KB
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- 45:
Method, Apparatus and Computer Program Product for Determining...
- Method, Apparatus and Computer Program Product for Determining a Frequency Domain Response of a Nonlinear Microelectronic Circuit Application Type: Utility Patent Number: 5663890 ...
URL: https://www.src.org/library/patent/p0014/
Modified: 1997-09-02 - 24KB
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- 46:
 SRC/NSF Design Forum - Position Statement
- NSF/SRC Forum on Future Directions for Design Automation Research Top Three Challenges for Electronic Design Automation Sachin Sapatnekar, University of Minnesota As system ...
URL: https://www.src.org/...hin-sapatnekar-position-statement.pdf
Modified: 2011-08-02 - 15KB
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- 47:
TECHCON 2012 (Event E004114) - SRC
- TECHCON 2012 Date: Monday, Sept. 10, 2012, 8 a.m. - Tuesday, Sept. 11, 2012, 10 p.m. CT Location: Renaissance Austin Hotel, Austin, TX, United States Event ID: E004114 E004114 ...
URL: https://www.src.org/calendar/e004114/
Modified: 2013-03-11 - 98KB
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- 48:
Design Forum: John Hayes Position Statement
- Future Directions for Design Automation: Three Challenges John P. Hayes October 1, 2006 1. Complexity and Change With CMOS transistor size approaching the nanometer range, two ...
URL: https://www.src.org/...764/john-hayes-position-statement.pdf
Modified: 2011-08-02 - 26KB
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- 49:
India Design Review (Event E005563) - SRC
- India Design Review Date: Wednesday, Jan. 7, 2015, 6 p.m. - Thursday, Jan. 8, 2015, 5 p.m. Local Location: Hyatt Bangalore, 1/1, Swami Vivekananda Road, Off M.G. Road, Ulsoor, ...
URL: https://www.src.org/calendar/e005563/
Modified: 2015-02-04 - 82KB
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- 50:
3D IC University Research e-Workshop (Event E004357) - SRC
- 3D IC University Research e-Workshop Date: Thursday, May 5, 2011, noon-4:30 p.m. ET Location: SRC Conference Room D; via web conference, Research Triangle Park, NC, United States ...
URL: https://www.src.org/calendar/e004357/
Modified: 2011-11-05 - 43KB
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