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| 1 through 29 of
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- 1:
Method for Correcting a Mask Design Layout (Patent P1016) - SRC
- Method for Correcting a Mask Design Layout Application Type: Continuation Patent Number: 7614032 Country: United States Status: Filed on 11-Dec-2006, Issued on 3-Nov-2009, Patent ...
URL: https://www.src.org/library/patent/p1016/
Modified: 2009-11-03 - 23KB
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- 2:
Method for Correcting a Mask Design Layout (Patent P0386) - SRC
- Method for Correcting a Mask Design Layout Application Type: Utility Patent Number: 7149999 Country: United States Status: Filed on 25-Feb-2004, Issued on 12-Dec-2006, Patent ...
URL: https://www.src.org/library/patent/p0386/
Modified: 2006-12-12 - 23KB
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- 3:
METHOD FOR CORRECTING A MASK DESIGN LAYOUT (Patent P1708) - SRC
- METHOD FOR CORRECTING A MASK DESIGN LAYOUT Application Type: Utility Patent Number: 7149999 Country: United States Status: Filed on 25-Feb-2004, Issued on 12-Dec-2006, Patent ...
URL: https://www.src.org/library/patent/p1708/
Modified: 2006-12-12 - 23KB
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- 4:
Single-Mask Double-Patterning Lithography (Patent P1185) - SRC
- Single-Mask Double-Patterning Lithography Application Type: Utility Patent Number: 8415089 Country: United States Status: Filed on 15-Mar-2010, Issued on 9-Apr-2013, Patent ...
URL: https://www.src.org/library/patent/p1185/
Modified: 2013-04-09 - 22KB
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- 5:
Interconnection Architecture and Method of Assessing Interconnection...
- Interconnection Architecture and Method of Assessing Interconnection Architecture Application Type: Utility Patent Number: 7622779 Country: United States Status: Filed on ...
URL: https://www.src.org/library/patent/p1027/
Modified: 2009-11-24 - 23KB
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- 6:
Method and Apparatus for Designing Circuits Using High-Level...
- Method and Apparatus for Designing Circuits Using High-Level Synthesis Application Type: Utility Patent Number: 7383529 Country: United States Status: Filed on 14-Feb-2005, Issued ...
URL: https://www.src.org/library/patent/p0529/
Modified: 2008-06-03 - 23KB
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- 7:
Systems, Methods and Computer Program Products for Creating Hierarchic...
- Systems, Methods and Computer Program Products for Creating Hierarchical Equivalent Circuit Models Application Type: Utility Patent Number: 7096174 Country: United States Status: ...
URL: https://www.src.org/library/patent/p0200/
Modified: 2006-08-22 - 24KB
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- 8:
Method for in-SITU Dry Cleaning, Passivation, and Functionalization...
- Method for in-SITU Dry Cleaning, Passivation, and Functionalization of GE Semiconductor Surfaces Application Type: Utility Patent Number: 9117653 Country: United States Status: ...
URL: https://www.src.org/library/patent/p1477/
Modified: 2015-08-25 - 25KB
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- 9:
Switch-Linearized CMOS Track and Hold Circuit (Patent P0587)...
- Switch-Linearized CMOS Track and Hold Circuit Application Type: Utility Patent Number: 7453291 Country: United States Status: Filed on 8-Sep-2005, Issued on 18-Nov-2008, Patent ...
URL: https://www.src.org/library/patent/p0587/
Modified: 2008-11-18 - 23KB
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- 10:
Method and Apparatus for Identifying Similar Regions of a Program...
- Method and Apparatus for Identifying Similar Regions of a Program's Execution Application Type: Utility Patent Number: 7802236 Country: United States Status: Filed on 9-Sep-2003, ...
URL: https://www.src.org/library/patent/p0406/
Modified: 2010-09-21 - 22KB
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- 11:
Method for In-Situ Dry Cleaning, Passivation, Functionalization...
- Method for In-Situ Dry Cleaning, Passivation, Functionalization of SI-GE Semiconductor Surfaces Application Type: Utility Patent Number: 9818599 Country: United States Status: ...
URL: https://www.src.org/library/patent/p1429/
Modified: 2017-11-14 - 25KB
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- 12:
Method of Locating Areas in an Image Such as a Photo Mask Layout...
- Method of Locating Areas in an Image Such as a Photo Mask Layout That Are Sensitive to Residual Processing Effects Application Type: Continuation (in part) Patent Number: 7155698 ...
URL: https://www.src.org/library/patent/p0409/
Modified: 2006-12-26 - 22KB
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- 13:
Method for Cleaning, Passivation and Functionalization of SI...
- Method for Cleaning, Passivation and Functionalization of SI-GE Semiconductor Sufraces Application Type: Divisional Patent Number: 10483097 Country: United States Status: Filed on ...
URL: https://www.src.org/library/patent/p1734/
Modified: 2019-11-19 - 25KB
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- 14:
Method and System for Synthesizing Relative Timing Constraints...
- Method and System for Synthesizing Relative Timing Constraints on an Integrated Circuit Design to Facilitate Timing Verification Application Type: Continuation Patent Number: ...
URL: https://www.src.org/library/patent/p1354/
Modified: 2012-11-27 - 24KB
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- 15:
Method of High Performance CMOS Design (Patent P0183) - SRC
- Method of High Performance CMOS Design Application Type: Utility Patent Number: 6549038 Country: United States Status: Filed on 14-Sep-2000, Issued on 15-Apr-2003, Patent Abandoned ...
URL: https://www.src.org/library/patent/p0183/
Modified: 2003-04-15 - 22KB
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- 16:
Method and System for Synthesizing Relative Timing Constraints...
- Method and System for Synthesizing Relative Timing Constraints on an Integrated Circuit Design to Facilitate Timing Verification Application Type: Utility Patent Number: 8239796 ...
URL: https://www.src.org/library/patent/p1202/
Modified: 2012-08-07 - 24KB
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- 17:
Method and System to Verify a Circuit Design By Verifying Consistency...
- Method and System to Verify a Circuit Design By Verifying Consistency Between Two Different Language Representations of a Circuit Design Application Type: Utility Patent Number: ...
URL: https://www.src.org/library/patent/p0424/
Modified: 2007-05-29 - 22KB
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- 18:
Formal Verification of a Logic Design Through Implicit Enumeration...
- Formal Verification of a Logic Design Through Implicit Enumeration of Strongly Connected Components Application Type: Utility Patent Number: 6526551 Country: United States Status: ...
URL: https://www.src.org/library/patent/p0189/
Modified: 2003-02-25 - 22KB
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- 19:
Methods of Operating on Data in a Fully Homomorphic Encryption...
- Methods of Operating on Data in a Fully Homomorphic Encryption System Using In-Situ Processing-in-Memory and Related Circuits Application Type: Utility Country: United States ...
URL: https://www.src.org/library/patent/p2112/
Modified: 2023-01-10 - 25KB
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- 20:
Decoder for Low-Density Parity-Check Convolutional Codes (Patent...
- Decoder for Low-Density Parity-Check Convolutional Codes Application Type: Utility Patent Number: 8078933 Country: United States Status: Filed on 13-Nov-2007, Issued on ...
URL: https://www.src.org/library/patent/p1062/
Modified: 2011-12-13 - 23KB
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- 21:
Ultra Wideband Receiver (Patent P1193) - SRC
- Ultra Wideband Receiver Application Type: Utility Patent Number: 8098707 Country: United States Status: Filed on 31-Jan-2007, Issued on 17-Jan-2012, Patent Abandoned Organization: ...
URL: https://www.src.org/library/patent/p1193/
Modified: 2012-01-17 - 23KB
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- 22:
Receiver With Colpitts Differential Oscillator, Colpitts Quadrature...
- Receiver With Colpitts Differential Oscillator, Colpitts Quadrature Oscillator, and Common-Gate Low Noise Amplifier Application Type: Divisional Patent Number: 7755442 Country: ...
URL: https://www.src.org/library/patent/p1100/
Modified: 2010-07-13 - 24KB
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- 23:
Receiver With Colpitts Differential Oscillator, Colpitts Quadrature...
- Receiver With Colpitts Differential Oscillator, Colpitts Quadrature Oscillator, And Common-Gate Low Noise Amplifier Application Type: Utility Patent Number: 7414481 Country: United ...
URL: https://www.src.org/library/patent/p0560/
Modified: 2008-08-19 - 24KB
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- 24:
Configurable Circuits Using Phase Change Switches (Patent P0534...
- Configurable Circuits Using Phase Change Switches Application Type: Utility Patent Number: 7634248 Country: United States Status: Filed on 1-Aug-2006, Issued on 15-Dec-2009, Patent ...
URL: https://www.src.org/library/patent/p0534/
Modified: 2009-12-15 - 22KB
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- 25:
Accuracy Configurable Adders and Methods (Patent P1359) - SRC
- Accuracy Configurable Adders and Methods Application Type: Utility Patent Number: 9229686 Country: United States Status: Filed on 27-Aug-2012, Issued on 5-Jan-2016 Organization: ...
URL: https://www.src.org/library/patent/p1359/
Modified: 2016-01-05 - 24KB
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- 26:
Correction for Pipelined Analog to Digital (A/D) Converter (Patent...
- Correction for Pipelined Analog to Digital (A/D) Converter Application Type: Utility Patent Number: 6784814 Country: United States Status: Filed on 7-Mar-2003, Issued on ...
URL: https://www.src.org/library/patent/p0289/
Modified: 2004-08-31 - 22KB
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- 27:
Method and System to Check Correspondence between Different Representa...
- Method and System to Check Correspondence between Different Representations of a Circuit Application Type: Continuation (in part) Patent Number: 7418680 Country: United States ...
URL: https://www.src.org/library/patent/p0476/
Modified: 2008-08-26 - 22KB
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- 28:
System and Method to Test Integrated Circuits on a Wafer (Patent...
- System and Method to Test Integrated Circuits on a Wafer Application Type: Utility Patent Number: 7325180 Country: United States Status: Filed on 26-Nov-2003, Issued on ...
URL: https://www.src.org/library/patent/p0413/
Modified: 2008-01-29 - 22KB
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- 29:
Self Bias and Digitally Tunable Conduction Angle Circuits for...
- Self Bias and Digitally Tunable Conduction Angle Circuits for a differential RF Non-linear Power Amplifier Employing Low-Voltage Transistors Application Type: Utility Patent ...
URL: https://www.src.org/library/patent/p0300/
Modified: 2007-05-22 - 22KB
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