Questions?
[x] SRC Program
GRC

[x] GRC Science Area
CADTS – Computer Aided Design & Test Sciences

Content Type
Events 24
Patent Filings 17
Other 1

Year
2015 3
2011 20
2010 1

Center
TxACE 5
ACE4S 1
C2S2 1
CAIST 1
CDADIC 1
CEMPI 1
CHIRP 1
EBSM 1
IPC 1
NCRC 1

Thrust/Theme
TT – Test & Testability 8
CADT – Computer-Aided Design and... 7
DesTech – Design Techniques 5
LPD – Logic & Physical Design 5
Physical Design 5
AMS-CSD – Analog/Mixed-Signal Ci... 4
CD – Circuit Design 4
HWS – Hardware Security 4
ISD – Integrated System Design 4
SLD – System Level Design 4
TechCAD – Technology CAD 4
VER – Verification 4
DV – Design Verification 2
ADS – Alternative Device Structu... 1
AIHW – Artificial Intelligence H... 1
AMS – Analog and Mixed-Signal De... 1
AdvTech – Advanced Technology 1
Advanced Bipolar SOI-MOS Transis... 1
Advanced Devices 1
Advanced Devices & Technologies 1
Advanced Technology Option 1
Analysis Design & Simulation 1
BEP – Back End Processes 1
Back End Processes 1
C&S – Controls and Sensing 1
CFM&TCM – CFM & Total Chemical M... 1
CM – Compact Modeling 1
CSR – Cross-Disciplinary Semicon... 1
Contamination Control 1
Cost Reduction 1
DCMOS – Digital CMOS Technologie... 1
DE – Design Environment 1
DSMS – Device Sciences Modeling ... 1
Defect Reduction 1
Deposition 1
DesSyn – Design Synthesis 1
Doping Technologies 1
EP3C – Efficiency and Performanc... 1
ESH – Environment Safety and Hea... 1
Equip Automation & Process Contr... 1
Equip – Equipment 1
Equip. Auto. and Process Control 1
FACSYS – Factory Systems 1
FAM – Factory Automation & Manag... 1
FEOL – FEOL Processes 1
FacOps – Factory Operations 1
Factory Systems 1
Front End Processes 1
Heat Signal & Power Distribution 1
Heat Signal Power 1
I3T – Innovative and Intelligent... 1
Interconnect Architecture 1
LMD – Logic and Memory Devices 1
Lithography 1
Logic Design 1
Logistics & Modeling/Simulation 1
MT – Memory Technologies 1
MTMP – Metrology Tools Matls & P... 1
Masks 1
Materials 1
Materials & Measurements 1
Metrology 1
Modeling & Simulation 1
Modeling & TCAD 1
Multi-level Interconnect 1
NCR – Non-Classical CMOS Researc... 1
NEM – Nanoengineered Materials 1
NMP – Nanomanufacturing Material... 1
PAT – Patterning 1
PKG – Packaging 1
PMM – Packaging Materials and Me... 1
PMS – Packaging Modeling and Sim... 1
PS/E – Process Simplification/En... 1
Package & Electrical Design 1
Package Reliability 1
Packaging & Interconnect Systems 1
Packaging Materials Interfaces 1
Pat(MPS) – Patterning 1
PatMat – Patterning Materials 1
PatSys – Patterning Systems 1
PhyDes – Physical Design 1
Plasma Etch 1
Process Architecture 1
Processes – Processes 1
Quality & Reliability 1
Rapid Yield Learning 1
Reliability 1
Resist 1
SemiSynBio – Semiconductor Synth... 1
Semiconductor Modeling & Simulat... 1
Signal/Power Management 1
Substrates 1
Synthesis & Verification 1
TCAD-MBPS 1
TM – Thermal Management 1

1 through 30 of 42 similar documents, best matches first.   
Results by:Thunderstone Page: 1 2 next >>
1: pdfFinal Report - Workshop on Failure and Uncertainty in Mixed-Signal...
National Science Foundation Workshop on Failure and Uncertainty in Mixed-Signal Circuits and Systems Arlington, Virginia July 8-9, 2010 Principal Investigators: Ralph Cavin, ...
URL: https://www.src.org/calendar/e004025/final-report.pdf
Modified: 2011-06-01 - 914KB
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2: pdfSRC/NSF Design Forum - Position Statement
© R.A. Rutenbar 2006 NSF Forum on Future Directions for Design Automation Research Increased Diversity: Position Statement NSF Forum on Future Directions for Design Automation ...
URL: https://www.src.org/...4/rob-rutenbar-position-statement.pdf
Modified: 2011-08-02 - 99KB
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3: pdfSRC/NSF Design Forum - Position Statement
Thoughts on the "Future Directions of Design Automation Research" Andreas Kuehlmann, Cadence Berkeley Labs October 24, 2006 Some of the main challenges we will face in the next ...
URL: https://www.src.org/...reas-kuehlmann-position-statement.pdf
Modified: 2011-08-02 - 69KB
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4: pdf3D IMAPS
Tezzaron Semiconductor 05/05/2011 SRC 3D Summit Bob Patti, CTO rpatti@tezzaron.com 1 Tezzaron Semiconductor 05/05/2011 Why We Scale? 2 >180nm 90nm 65nm 130nm 45nm 28nm 22nm 16nm ...
URL: https://www.src.org/calendar/e004357/04-patti.pdf
Modified: 2011-05-04 - 4.4MB
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5: pdfSRC/NSF Design Forum - Position Statement
ATT4457633.txt Views on Important Direction in Design Automation J. White Professor, Department of Electrical Engineering and Computer Science Massachusetts Institute of Technology ...
URL: https://www.src.org/...64/jacob-white-position-statement.pdf
Modified: 2011-08-02 - 21KB
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6: Systems, Methods and Computer Program Products for Creating Hierarchic...
Systems, Methods and Computer Program Products for Creating Hierarchical Equivalent Circuit Models Application Type: Utility Patent Number: 7096174 Country: United States Status: ...
URL: https://www.src.org/library/patent/p0200/
Modified: 2006-08-22 - 24KB
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7: Wire Width Planning and Performance Optimization for VLSI Interconnect...
Wire Width Planning and Performance Optimization for VLSI Interconnects Application Type: Utility Patent Number: 6408427 Country: United States Status: Filed on 22-Feb-2000, Issued ...
URL: https://www.src.org/library/patent/p0001/
Modified: 2002-06-18 - 29KB
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8: pdfPresentation Title
PAGE 1 QUALCOMM CONFIDENTIAL AND PROPRIETARY QUALCOMM CONFIDENTIAL AND PROPRIETARY qctconnect.com 3D Through Si Stacking Technology - an IFM Perspective - RikoR May 11 PAGE 2 ...
URL: https://www.src.org/calendar/e004357/02-radojcic.pdf
Modified: 2011-05-04 - 2.4MB
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9: pdfSRC/NSF Design Forum - Position Statement
A Position Statement in the Forum on Future Directions for Design Automation Research Jason Cong UCLA Computer Science Department http://cadlab.cs.ucla.edu/~cong There are many ...
URL: https://www.src.org/...764/jason-cong-position-statement.pdf
Modified: 2011-08-02 - 35KB
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10: pdfVertically Integrated Test/Calibration and Reliability Enhancement...
Vertically Integrated Test/Calibration and Reliability Test/Calibration and Reliability Enhancement for Systems with RF/Analog Content RF/Analog Content Sule Ozev Sule.ozev@asu.edu ...
URL: https://www.src.org/calendar/e004025/ozev.pdf
Modified: 2010-07-19 - 54KB
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11: pdfDesign Forum: Ken Shepard Position Statement
Future of Design Automation Research Ken Shepard, Columbia University I would like to highlight the following three challenges for future design automation research. Broadly, these ...
URL: https://www.src.org/...64/ken-shepard-position-statement.pdf
Modified: 2011-08-02 - 64KB
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12: India Design Review (Event E005563) - SRC
India Design Review Date: Wednesday, Jan. 7, 2015, 6 p.m. - Thursday, Jan. 8, 2015, 5 p.m. Local Location: Hyatt Bangalore, 1/1, Swami Vivekananda Road, Off M.G. Road, Ulsoor, ...
URL: https://www.src.org/calendar/e005563/
Modified: 2015-02-04 - 82KB
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13: pdfPowerPoint Presentation
Innovate in India OR Make in India What is relevant for companies like Texas Instruments in India? Santhosh Kumar Texas Instruments sant@ti.com Texas Instruments An Overview Our ...
URL: https://www.src.org/calendar/e005563/ti_india_santhosh.pdf
Modified: 2015-02-04 - 2.9MB
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14: pdfSRC/NSF Design Forum - Posiltion Statement
Future Directions for Design Automation Research Tim Cheng, UCSB In my opinion, the following are three key challenges for future design automation research. Silicon Debugging: The ...
URL: https://www.src.org/...2764/tim-cheng-position-statement.pdf
Modified: 2011-08-02 - 14KB
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15: pdfSRC/NSF Design Forum - Position Statement
NSF/SRC Forum on Future Directions for Design Automation Research Top Three Challenges for Electronic Design Automation Sachin Sapatnekar, University of Minnesota As system ...
URL: https://www.src.org/...hin-sapatnekar-position-statement.pdf
Modified: 2011-08-02 - 15KB
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16: pdfDesign Forum: Bill Read Position Statement
Freescale(tm) and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale ...
URL: https://www.src.org/...2764/bill-read-position-statement.pdf
Modified: 2011-08-02 - 57KB
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17: Multi-Layer Integrated Circuits Having Isolation Cells for Layer...
Multi-Layer Integrated Circuits Having Isolation Cells for Layer Testing and Related Methods Application Type: Continuation (in part) Patent Number: 10838003 Country: United States ...
URL: https://www.src.org/library/patent/p1826/
Modified: 2020-11-17 - 25KB
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18: Multi-Layer Integrated Circuits Having Isolation Cells for Layer...
Multi-Layer Integrated Circuits Having Isolation Cells for Layer Testing and Related Methods Application Type: Utility Patent Number: 10338133 Country: United States Status: Filed ...
URL: https://www.src.org/library/patent/p1639/
Modified: 2019-07-02 - 25KB
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19: pdfDesign Forum: David Kung Position Statement
Future of Design Automation To determine the future direction of Design Automation, we need to take a careful look at the trends in design (systems and circuits) and technology. On ...
URL: https://www.src.org/...764/david-kung-position-statement.pdf
Modified: 2011-08-02 - 33KB
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20: pdfPowerPoint Presentation
RTI International High Performance Processing Systems Enabled by 3D Integration Bob Conn May 5, 2011 1 Bob Conn, RTI International, rconn@rti.org, bobconn@ieee.org RTI ...
URL: https://www.src.org/calendar/e004357/03-conn.pdf
Modified: 2011-05-04 - 1.1MB
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21: Semiconductor Research Corporation - SRC
GRC GRC Global Research Collaboration Our motivation is to fund the most relevant and critical research for international companies, so we go where the best university talent ...
URL: https://www.src.org/program/grc/
Modified: 2023-10-10 - 33KB
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22: pdfSRC: GRC Design Forum Postion Statement - Jeff Parkhurst,Intel
Future Design Environment Complexity in 2017: - Designs will contain over 200B transistors. - Design teams will remain constant size o CAD must bridge the productivity GAP - ...
URL: https://www.src.org/...2764/parkhurst-position-statement.pdf
Modified: 2011-08-02 - 16KB
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23: pdfSlide 1
Third Annual India Design Review January 7-8, 2015 William H. Joyner, Jr. CADTS William.Joyner@src.org David C. Yeh ICSS David.Yeh@src.org Restricted Distribution: Contains SRC ...
URL: https://www.src.org/...r/e005563/2015_indiawelcome_final.pdf
Modified: 2015-02-04 - 319KB
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24: Built-in Current Testing of Integrated Circuits (Patent P0109...
Built-in Current Testing of Integrated Circuits Application Type: Utility Patent Number: 5025344 Country: United States Status: Filed on 22-Feb-1990, Issued on 18-Jun-1991, Patent ...
URL: https://www.src.org/library/patent/p0109/
Modified: 1991-06-18 - 22KB
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25: Method and Apparatus For Rapidly Modeling and Simulating Intra...
Method and Apparatus For Rapidly Modeling and Simulating Intra-Die Statistical Variations in Integrated Circuits using Compressed Parameter Models Application Type: Utility Patent ...
URL: https://www.src.org/library/patent/p1160/
Modified: 2012-10-16 - 24KB
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26: pdfDesign Forum: Sharad Malik Panel Position Statement
Making our Way through the End-of-the Roadmap Maze Panel Position Statement Sharad Malik Princeton University As we look forward over the next 10-15 years, there are several ...
URL: https://www.src.org/...4/sharad-malik-position-statement.pdf
Modified: 2011-08-02 - 20KB
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27: pdfSRC/NSF Design Forum - Position Statement
SRC/NSF Workshop on Future Directions for Design Automation Research Comments by David Yeh, Texas Instruments, currently an assignee at SRC I approached this from two perspectives. ...
URL: https://www.src.org/...2764/david-yeh-position-statement.pdf
Modified: 2011-08-02 - 12KB
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28: Power Switch Design and Method for Reducing Leakage Power in...
Power Switch Design and Method for Reducing Leakage Power in Low-Power Integrated Circuits Application Type: Utility Patent Number: 8373493 Country: United States Status: Filed on ...
URL: https://www.src.org/library/patent/p1239/
Modified: 2013-02-12 - 22KB
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29: pdfDesign Forum: John Hayes Position Statement
Future Directions for Design Automation: Three Challenges John P. Hayes October 1, 2006 1. Complexity and Change With CMOS transistor size approaching the nanometer range, two ...
URL: https://www.src.org/...764/john-hayes-position-statement.pdf
Modified: 2011-08-02 - 26KB
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30: System and Method to Test Integrated Circuits on a Wafer (Patent...
System and Method to Test Integrated Circuits on a Wafer Application Type: Utility Patent Number: 7325180 Country: United States Status: Filed on 26-Nov-2003, Issued on ...
URL: https://www.src.org/library/patent/p0413/
Modified: 2008-01-29 - 22KB
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1 through 30 of 42 similar documents, best matches first.   
Results by:Thunderstone Page: 1 2 next >>